Raspberry Pi HAT design guide: HAT+ rules for a Pi 5 board in KiCad

Raspberry Pi introduced HATs with the Model B+ in 2014. Its HAT+ specification (first release 8 December 2023, latest build 5 December 2024) replaces the original HAT rules, which are now deprecated, and makes four changes:

• A HAT+ must work in the STANDBY power state of the Pi 4 and later, where the 5 V rail is on and the 3.3 V rail is off.
• The physical dimensions are less prescriptive.
• The EEPROM holds less. It carries the name of a device tree overlay instead of the overlay itself, and the Pi loads the overlay from /boot/firmware/overlays.
• There are new classes: a Stackable HAT+ that can share a Pi with a normal HAT, and Power HAT+s.

The minimum for the name is short. The board plugs into the 40-way GPIO header, works in STANDBY if it takes power from the header, has an ID EEPROM with 3.9 kΩ pull-ups to 3.3 V, and fastens to at least one of the Pi’s mounting holes. A HAT+ is electrically backwards-compatible with older Pis, though they may need a firmware update. A board that does not follow the specification still works; it just cannot be sold as a HAT or HAT+.

At boot the Pi’s firmware looks for an EEPROM on ID_SD (GPIO0, pin 27) and ID_SC (GPIO1, pin 28), reads it, and loads the device tree overlay it names. That overlay is what sets up your pins and drivers. Raspberry Pi is specific about the part:

• a 24Cxx I²C EEPROM that runs at 3.3 V (not a 5 V-only part);
• 16-bit addressing, not 8-bit, and not a paged part whose low address bits select the page;
• a write-protect pin that protects the whole memory, and no I²C clock stretching;
• 100 kHz is enough.

Those rules rule out many small I²C EEPROMs. Raspberry Pi recommends onsemi’s CAT24C32, a 32 Kb (4 KB) part: its datasheet gives 1.7 to 5.5 V and hardware write protection for the entire memory.

ID_SD and ID_SC each get a 3.9 kΩ pull-up to 3.3 V on the HAT. The write-protect pin goes to a test point and is pulled up to 3.3 V with 1 kΩ. That way the EEPROM is protected once the board leaves the factory, and the test fixture writes it by driving the test point low. The pull-up is stiff because the CAT24C32 pulls WP down internally. Raspberry Pi’s original design guide adds an optional jumper from WP to ground, so that a user can rewrite the EEPROM on purpose (JP1 in the figure).

A HAT+ EEPROM answers at 101 00XY in binary, 0x50 to 0x53. The last two bits tell the firmware which class of board it is, so the EEPROM’s A0 and A1 pins choose the class:

A Pi can carry one HAT+ of each class at a time: a Standard HAT+ or legacy HAT, a Stackable HAT+ and a Power HAT+, up to three. The Stackable and Power classes need current firmware; older firmware does not know them. For a Power HAT+, the address also sets how much current the Pi tries to draw: MODE1 turns on usb_max_current_enable=1.

Tie the address pins straight to ground or 3.3 V. The CAT24C32 pulls them low inside when they float, which gives 0x50. onsemi notes that this pull-down is relatively strong, so whatever pulls an address pin high has to supply its current.

The Raspberry Pi 5 is 85 × 56 mm, with four ø2.7 mm holes for M2.5 screws on a 58 × 49 mm pattern, 3.5 mm in from the edges. Its 2 × 20 header is centred 29 mm from the left-hand holes. Raspberry Pi’s own HATs keep the original HAT size: the Sense HAT and the M.2 HAT+ are both 65 × 56.5 mm, the same width as the hole pattern plus 3.5 mm each side. HAT+ only requires the board to reach the whole 40-way header, ID pins included, and one hole to line up with a Pi hole. A smaller or odd-shaped board is allowed.

Raspberry Pi also recommends that a HAT+:

• does not foul the PoE header, which sits in a different place on each board. On a Pi 5 it is 6 mm above the lower-right hole; on a Pi 4 it is 42.86 mm above that hole, just under the top-right one;
• does not block the camera, display and PCIe flex connectors. On the Pi 5 the PCIe connector is on the left-hand short edge, and the two camera/display connectors sit near the bottom edge, between the second micro HDMI port and the Ethernet jack. Raspberry Pi’s M.2 HAT+ makes room with a 5 × 18 mm notch, 17.5 mm from the top edge, and a 10 × 16.5 mm cutout, 47.5 mm from the left edge;
• comes with a stacking header, spacers and screws that keep it clear of the Pi’s parts. With an Active Cooler fitted that means at least 15 mm between the boards, ideally 16 mm, and more if your HAT has parts on its underside.

KiCad 9 ships two Raspberry Pi project templates: RaspberryPi-HAT and, for the Pi Zero size, RaspberryPi-uHAT (65 × 30 mm). Open one with File → New Project from Template. The HAT template already has a lot right:

• the board edge, 65 × 56 mm with 3 mm corners, plus a second edge on User.Drawings 0.5 mm higher for a surface-mount header;
• four 2.7 mm M2.5 holes, 3.5 mm in from each edge;
• a 2 × 20 socket with its pin 1 at 8.37 mm from the left edge, which centres the header 29 mm from the left-hand holes, as on the Pi 5 drawing;
• the ID EEPROM circuit with 3.9 kΩ pull-ups.

It was written for the original HAT specification, though, and its notes list models up to the Pi 4. Here is what we found when we exported its netlist with kicad-cli:

Run KiCad’s electrical rule check on the template as shipped and it reports 26 dangling labels and three power pins not driven as errors, plus two library-mismatch warnings. None is a fault in a blank template. The labels are the header’s GPIO names, waiting for your circuit, and the power warning goes away once the rails have a source or a PWR_FLAG; the power pin page explains that one.

A Pi 4 or Pi 5 can be set to shut down into STANDBY instead of the older warm standby: the power management chip stays powered from 5 V, and every other supply, the 3.3 V rail included, is off. A HAT+ powered from the header must be electrically compatible with that state, and must not assume either rail comes up first. In practice, check everything on your board that runs from 5 V. While the 3.3 V rail is off, nothing should drive a GPIO pin or feed current back into 3.3 V.

A HAT+ that powers the Pi through the 5 V pins is a Power HAT+, and it has its own rules:

• it must supply at least 3 A at 5.1 V, and Raspberry Pi strongly recommends 5 A (13 W PoE HAT+s are the exception);
• it must only source current, never sink it;
• it must stay safe if someone also plugs in the Pi’s USB-C supply.

Its device tree overlay can state the current it supplies, in mA, in /chosen/power. The original rules recommended an “ideal diode” safety circuit ahead of the 5 V of any board that back-powers the Pi through the header. Whatever you do, never connect a power source to the 3.3 V pins.

At power-on every GPIO pin on the header is an input with a weak pull-up or pull-down. A HAT+ has to tolerate either, at any time, and must not assume they are applied or removed all at once. If a pin of yours must sit high or low from the start, such as an enable or a chip select, give it an external pull resistor. GPIO2 and GPIO3 (I²C1 SDA and SCL) are the exception: they already have pull-ups of about 2 kΩ to 3.3 V on the Pi. The original HAT rules also ask a board that drives GPIO6, 14 or 16 to protect itself against very old firmware, which could drive those pins as outputs at boot.

Every pin is 3.3 V only. For which pin carries which peripheral, see the Raspberry Pi GPIO pinout, which also covers what the Pi 5’s RP1 I/O chip changes for software.

The EEPROM holds:

• a product UUID, a vendor string and a product string (required);
• a product ID and a version (optional);
• the name of the board’s device tree overlay (recommended). Raspberry Pi suggests names of the form manufacturer-hatname; names starting with rpi- are reserved for Raspberry Pi.

The tools are in Raspberry Pi’s utils repository, under eeptools. To program a board:

1. Fill in a copy of eeprom_settings.txt and build the image with eepmake myhat_eeprom.txt myhat.eep. Keep the UUID eepmake generates in your settings file.
2. Disable write protection by pulling the WP test point low.
3. Create a software I²C bus on the ID pins with sudo dtoverlay i2c-gpio i2c_gpio_sda=0 i2c_gpio_scl=1 bus=9. The pins also belong to I²C0, which cameras and displays use.
4. Check that i2cdetect -y 9 shows the EEPROM at 50.
5. Write the image with sudo ./eepflash.sh -w -t=24c32 -a=0x50 -f=myhat.eep.
6. Re-enable write protection.

A compliant board should carry the HAT+ wordmark on its silkscreen; Raspberry Pi publishes it as SVG, EPS and a CAD symbol. The product name should include “HAT+”, as in “Raspberry Pi M.2 HAT+ M Key”. A HAT+ may fit only some Pi models, electrically or mechanically. If so, it must say which models on the board itself and in its documentation, as a board shaped around the Pi 5’s keep-outs would.

Before you order, export the board’s Gerbers and look at them layer by layer. The Gerber check guide shows what to look for. On a HAT that means the outline with its notches, the four holes and the header drills.