I²C pull-up resistor value: how to calculate it, with worked values for 3.3 V

SDA and SCL are open-drain: a device can pull a line low, and nothing on the bus ever drives it high. The pull-up resistor does that. When every device lets go, the resistor charges the line, and the wiring and pins on it (the bus capacitance) decide how fast. That charging edge is the whole story: too slow and a receiver sees a high late or not at all; too strong and the devices cannot pull the line low enough.

The specification sets both ends in its section 7.1, and the limits it uses are in its Table 10:

A device must be able to sink 3 mA while holding the line at or below 0.4 V in Standard-mode and Fast-mode, and 20 mA in Fast-mode Plus. A receiver reads below 0.3 V_DD as low and above 0.7 V_DD as high.

The smaller the resistor, the more current flows through it while a device holds the line low. The device is only guaranteed to sink 3 mA at 0.4 V, so:

Rp(min) = (VDD - VOL(max)) / IOL

3.3 V:          (3.3 V - 0.4 V) / 3 mA = 0.97 kOhm
5 V +/- 10 %:   (5.5 V - 0.4 V) / 3 mA = 1.7 kOhm   (the specification's example, section 7.2.4)
Fast-mode Plus: (3.3 V - 0.4 V) / 20 mA = 145 Ohm

Use the highest supply voltage the board will see, as the specification’s 5 V example does. Below the minimum, a low may sit above 0.4 V and eat into the noise margin, and the parts run outside their rating. Some parts can sink more: Sensirion’s SHT4x datasheet allows pull-ups down to 390 Ω. The bus is only as strong as its weakest device, though, so size for 3 mA unless every part on it is rated for more.

A resistor charging a capacitor rises along V(t) = V_DD(1 − e^−t/RC). From 0.3 V_DD to 0.7 V_DD takes ln(7/3) × RC, which is 0.8473 × RC. Setting that equal to the allowed rise time gives the largest resistor that still makes the edge in time:

Rp(max) = tr / (0.8473 x Cb)

100 kHz, 100 pF:  1000 ns / (0.8473 x 100 pF) = 11.8 kOhm
400 kHz, 100 pF:   300 ns / (0.8473 x 100 pF) =  3.54 kOhm
400 kHz, 200 pF:   300 ns / (0.8473 x 200 pF) =  1.77 kOhm

Plot both limits against bus capacitance and the usable range is the band between them:

Two things stand out. At 400 kHz the band narrows fast: by 366 pF the Fast-mode maximum meets the 0.97 kΩ minimum, and no pull-up works with 3 mA parts. And the band is wide at 100 kHz, which is why almost any value seems fine until the clock goes up. Within the band, the specification’s advice is to go toward the high end on battery-powered designs, where the current through the resistor while a line is low matters.

The same formula, turned around: the largest bus capacitance at which each common value still meets the rise time, C_b = t_r / (0.8473 × R_p).

The 10 kΩ row is the one people meet in datasheets: Sensirion’s SHT4x quick-start circuit draws 10 kΩ pull-ups. That is a sound choice next to the sensor at 100 kHz, and the part supports 400 kHz and faster, but at 400 kHz 10 kΩ is only good for 35 pF of bus. Treat a datasheet’s pull-up value as an example for its figure, not as the value for your bus.

C_b is everything on the line: each device pin (the specification allows up to 10 pF per pin), the PCB trace, connectors and any cable. A short bus on one board with two or three devices is usually well below 100 pF. A ribbon cable to another board can add more than all the chips together.

Measuring is better than guessing. On a scope, read the rise time from 30 % to 70 % of V_DD on SCL and turn the formula around: C_b = t_r / (0.8473 × R_p). A 400 ns edge with 4.7 kΩ pull-ups means about 100 pF, too slow for 400 kHz, and the fix is a smaller resistor, not a slower probe. The probe itself adds capacitance, so measure the edge, don’t judge the bus by whether it works with the probe on.

When the bus is long enough that no resistor fits, the specification’s section 7.2 lists the ways out: run the clock slower, use parts rated for Fast-mode Plus (20 mA drive), split the bus with a buffer such as the PCA9517, or use a switched pull-up that adds a strong pull only during the rising edge.

Breakout boards almost always carry their own pull-ups, so a bus of three breakouts has three pairs. In parallel they make a smaller resistance, which speeds the edge (fine) and raises the current a device must sink (not fine past 3 mA). How many identical boards one bus can take before the total drops below the minimum:

On a schematic of your own, the same thing happens when each sensor is copied from its reference circuit with its pull-ups. Take the two-sensor sheet shown further down and leave in the pull-ups from two reference circuits: 10 kΩ from the SHT4x datasheet and 4.7 kΩ from a BME280 breakout, beside the board’s own 2.2 kΩ. The netlist check described there reports it like this:

/SDA: R2 2.2k to +3V3, R4 10k to +3V3, R6 4.7k to +3V3 -> 1.30 kOhm, 2.23 mA to sink at VOL 0.4 V
  Standard-mode: rise time met up to 400 pF (spec limit 400 pF)
  Fast-mode: rise time met up to 272 pF
  Fast-mode Plus: rise time met up to 109 pF

1.30 kΩ is still inside the limit, with 2.23 mA of the 3 mA allowed. Plug two more boards with 4.7 kΩ pull-ups into the header and the bus is at 0.84 kΩ, 3.5 mA: over. Where the modules allow it, remove the extra pairs (many breakouts have a solder jumper for it) and keep one pair sized for the whole bus.

Microcontrollers can switch on a weak pull-up inside each pin, and some I²C libraries do. Espressif’s ESP32-C3 datasheet gives 45 kΩ for it. With 45 kΩ, the 100 kHz rise time is met only below 26 pF of bus, and 400 kHz below 8 pF: two device pins at the specification’s 10 pF each already exceed both. The same datasheet says the C3’s I²C runs up to 800 Kbit/s “constrained by SCL and SDA pull-up strength”. Fit external resistors. Other microcontrollers’ weak pull-ups are of the same kind: find the value in the DC characteristics table of the datasheet and put it through the same formula before relying on one.

A question on Electrical Engineering Stack Exchange in November 2026 describes the classic symptom: a magnetic encoder module on a 30 cm Dupont ribbon cable, 4.7 kΩ pull-ups on the module, 100 kHz, and a bus that only works while a finger, a scope probe or a loose length of wire touches SDA. Halving the pull-ups did not fix it; a 10 to 15 cm cable did. The commenters pointed at SDA and SCL running side by side in the ribbon, and the asker found that peeling SDA away from the other wires changed the behaviour. At the time of writing the question has no accepted answer.

A bus that changes with a touch is marginal: a little capacitance or coupling is enough to tip it either way. The specification’s section 7.5 has the wiring advice the commenters were reaching for. Bus lines are most open to crosstalk while high, because the pull-up is a high impedance. Above 10 cm, wire them in the order SDA, VDD, VSS, SCL, so a supply line sits between the two signals; if only ground is in the cable, SDA, VSS, SCL. In twisted pairs, twist each line with ground, or SCL with ground and SDA with VDD, decoupling VDD to ground at both ends. Then:

• Size the pull-ups for the cable, with the table above, rather than the board alone.
• Look at SCL and SDA together on two probes, and read the edges, not just whether it works.
• Try 100 kHz or lower; a bus that works slowly is telling you its edges are the problem.
• Series resistors at each device reduce crosstalk and undershoot, the specification notes; its protection example uses 300 Ω. Add them into the pull-up calculation, since they raise the low level.
• For long runs, use a bus buffer or a differential extender rather than a stronger pull-up.

This is the two-sensor board from the CTA below, drawn in KiCad 9: a BME280 and an SHT40 on one bus, and one pair of 2.2 kΩ pull-ups sized for 400 kHz on up to 161 pF.

KiCad’s electrical rules check does not look at pull-ups. KiCad 9.0.9 reports 0 errors on this sheet, and 0 errors on a copy with R1 and R2 deleted, where the bus could never go high (both copies get the same single warning, for the BME280’s address pin strapped to the flagged ground). The AI PCB review page shows the same blind spot on a breakout.

A netlist does carry the answer, so a short script can check it. This one reads KiCad’s netlist export (kicad-cli sch export netlist --format kicadsexpr), finds every resistor from SDA or SCL to a supply rail, combines them and applies the two formulas. On the sheet above:

/SDA: R2 2.2k to +3V3 -> 2.20 kOhm, 1.32 mA to sink at VOL 0.4 V
  Standard-mode: rise time met up to 400 pF (spec limit 400 pF)
  Fast-mode: rise time met up to 161 pF
  Fast-mode Plus: rise time met up to 64 pF

On the copy with the pull-ups deleted, which ERC passed:

/SCL: NO PULL-UP. I2C is open-drain; this line never goes high on its own.
/SDA: NO PULL-UP. I2C is open-drain; this line never goes high on its own.

Run on the 4.7 kΩ BME280 breakout from the schematic-to-PCB guide, it reports 75 pF for 400 kHz and 251 pF for 100 kHz: right for that board on its own, short for a cable.

PCBEditor’s design check, which runs on the boards it designs, reports “I2C lines have no pull-up resistors” when an I²C pin’s net reaches another device and has no resistor to a supply. A bus pulled up on another board, through a connector, gets the warning too; read it as a reminder to confirm that board has them. When it builds a board from a description, it adds a 4.7 kΩ pull-up from each I²C line that has none to the chip’s own supply, and adds none when the chip has no supply connected to pull to.

The limit: the check knows a pull-up is there, not whether its value suits your bus. It does not know how long the cable is or how many modules will share the bus. 4.7 kΩ is right for a short on-board bus at 100 kHz and at 400 kHz up to 75 pF; for a cable or a crowded bus, name the value in your description and check it on the schematic before ordering.