ESP32 LiPo charger circuit: MCP73831 or TP4056, load sharing and battery level

Four blocks, left to right: a USB-C input that asks the host for 5 V with one 5.1 kΩ per CC pin, the charger and the cell, a load-sharing path that picks USB or the cell for the rest of the board, and a 3.3 V regulator with the ESP32. A divider from the cell to an ADC pin reads the battery.

It is one KiCad 9 sheet, cropped in two. It passes the electrical rule check, and the netlist was read net by net: STAT drives the LED’s cathode, the cell and Q1’s drain share VBAT, and only VSYS feeds the regulator. The values for the module (decoupling and the EN delay) are the ones in Espressif’s ESP32-C3-WROOM-02 datasheet. Pick the cell’s connector polarity from the cell, not from the footprint: JST-PH leads are not wired the same way by every seller.

All three are linear single-cell chargers with a constant-current, constant-voltage cycle. They differ in current, accuracy and whether they can run the board themselves.

• MCP73831 for a small cell and a USB port: a five-pin part, the tighter charge voltage, and a KiCad library symbol.
• TP4056 when you want 1 A, or when you are using a ready-made module. It has a TEMP pin for the cell’s thermistor; ground it to disable the check.
• BQ24074 when the board must run while it charges, or from a weak USB source. It powers the board and charges the cell at the same time, and limits what it draws from USB (100 mA or 500 mA, or a set limit).

On the MCP73831 the current is 1000 V divided by the PROG resistor, in kΩ and mA: 2 kΩ gives 500 mA, 10 kΩ gives 100 mA. On the TP4056 use the datasheet’s table:

Three limits decide the value, and the lowest wins:

• The cell. Microchip’s datasheet gives the usual rule: 1C preferred, 2C absolute maximum. A 500 mAh cell charges at 500 mA; a 150 mAh cell at 150 mA, which on a TP4056 means about 10 kΩ, not the 1.2 kΩ of a 1 A setting.
• The USB port. The board draws from the same 5 V while it charges. An ESP32-C3 peaks at 335 mA while transmitting, so a 500 mA charge plus a working board is more than a 500 mA port gives. Charge slower, or use the BQ24074, which limits the input and gives the board priority. The CC resistors only ask the host for its default current.
• Heat, below.

A linear charger drops the difference between the input and the cell across itself. The worst moment is just after the cell leaves the trickle phase: the cell is near 3 V and the current is at full.

• MCP73831: Microchip’s own example is (5.5 V − 2.7 V) × 550 mA = 1.54 W. In the SOT-23-5, rated 230 °C/W on a standard board (130 °C/W or better with large copper), that is well past what it can shed, and the chip enters thermal regulation. The DFN package is rated 76 °C/W.
• TP4056: (5 V − 3.0 V) × 1 A = 2 W in an SOP-8. It holds its junction at 145 °C by cutting the current.

Neither fails; the current drops and the charge takes longer. If the board is meant to charge at the full set current, give the chip copper: a pour on the thermal pad or the ground pins, with vias to an inner or bottom plane.

A simple charger ends the charge when its current falls to a set fraction of the programmed current (C/10 on the TP4056, an option between 5 % and 20 % on the MCP73831). If the board hangs on the cell, its draw is part of that current, and a board drawing more than the threshold keeps the charge from ever ending.

The fix in the first figure is Microchip’s AN1149 load-sharing path. With USB present, VSYS comes from VBUS through D2, and Q1’s gate sits at 5 V, above its source, so Q1 is off and the charger sees only the cell. Unplug USB and R5 (100 kΩ) pulls the gate to ground; Q1 turns on and VSYS comes from the cell. Two choices matter:

• Q1 must turn fully on with only the cell’s voltage across its gate, about 3 V near the end of the charge. Read its on-resistance at a gate-source voltage of 2.5 V in its datasheet, not at 10 V.
• D2 carries the whole board while USB is in. Rate its average current above the board’s (the ESP32-C3-WROOM-02 asks for a supply that delivers 0.5 A), and expect VSYS a few hundred millivolts below VBUS.

VSYS then runs from about 3.0 V (cell nearly empty) to about 4.7 V (USB). The AP2112K-3.3 accepts 2.5 to 6.0 V; what it does near the bottom of the cell is the dropout question in 3.3 V from a LiPo cell. The BQ24074 does all of this inside one chip: it holds its output at 4.4 V from USB, charges with what is left, and switches to the cell when USB goes away.

A TP4056 module with protection has B+ and B− for the cell and OUT+ and OUT− for the load. OUT+ is the cell voltage, 3.0 to 4.2 V, not a regulated rail. Two wirings are common, and both go wrong:

• OUT+ to the dev board’s 3V3 pin. A full cell puts 4.2 V on a chip rated 3.0 to 3.6 V. It may run for a while; it is outside the rating every time the cell is above 3.6 V.
• OUT+ to the dev board’s 5V pin. Within ratings, but the cell then goes through the dev board’s own regulator, which may need more headroom than a LiPo has, and the board resets as the cell drops. Check that regulator’s dropout in its datasheet; the arithmetic is in 3.3 V from a LiPo cell.

On a custom board, wire OUT+ to the input of a low-dropout 3.3 V regulator (or a buck-boost converter), as in the second figure. Also check the PROG resistor on the module against the table above; 1.2 kΩ means 1 A.

If the module carries a protection IC such as the DW01A, it cuts the cell off at 4.30 V (overcharge) and 2.40 V (overdischarge), and reconnects at 4.10 V and 3.00 V. Treat 2.40 V as the last resort, not as your low-battery cut-off. Set your own in firmware, well above it, and go to deep sleep there.

The cell reaches 4.2 V and the ADC reads at most 2.5 V, so it needs a divider. Three numbers from Espressif’s datasheet decide its values:

• The pin. ADC1 is on GPIO0 to GPIO4 and is factory-calibrated. GPIO0 and GPIO1 double as the 32 kHz crystal pins, GPIO2 is a strapping pin and GPIO4 is a JTAG pin, so GPIO3 is the free one. GPIO5 is ADC2: not calibrated, and not working on some chip revisions.
• The range. At the 0–2500 mV setting the calibrated error is ±35 mV. At 0–1300 mV it is ±10 mV.
• The current. In deep sleep the chip draws 5 µA, so a divider that draws 21 µA (two 100 kΩ resistors) uses four times more than the chip itself.

The high-value divider halves the error and draws about seventeen times less. Its source impedance is about 0.7 MΩ, so C8 does the work at the moment of sampling: 100 nF at the pin holds the voltage while the ADC takes its sample, and it is the capacitor Espressif’s own ADC figures were measured with. After a big change, such as plugging in the cell, allow a few tenths of a second for it to settle.

Read the cell when the radio is idle. A transmit burst pulls the cell down for a moment, and the reading drops with it. A cell’s voltage is not a linear fuel gauge either: take the percentage from its datasheet’s discharge curve, or treat the voltage as three levels (full, fine, charge me).

• The PROG (or ISET) resistor gives a current at or below the cell’s 1C rate and within the USB budget.
• Nothing on the 3.3 V rail can see the cell directly: every path from VBAT or OUT+ goes through the regulator.
• The regulator is fed from the load-sharing node (VSYS) or a power-path output, not from the charger’s cell pin, if the board runs while charging.
• Q1’s on-resistance is rated at a gate voltage the cell can give; D2’s current rating covers the whole board.
• The charger has copper for its heat, and the cell is not sitting on it.
• The cell connector’s polarity matches the cell you will buy.
• The divider is on an ADC1 pin, with 100 nF at the pin, and the firmware uses the 0–1300 mV range for a 2.4 : 1 divider.
• The module has its EN delay (10 kΩ and 1 µF on the ESP32-C3-WROOM-02) and its decoupling at the 3V3 pin.

For the rest of an ESP32 board (antenna keep-out, USB, strapping pins), see ESP32 PCB design.